Processor architectures sporting multiple CPU cores on the same device have moved swiftly from the exotic and into the mainstream desktop and sever realm. Gone now are the days when there was a long gap between the emergence of a microprocessor product line and the demand for it among the military embedded computing realm. Now with the dual-core, multicore CPU trend firmly established in the general computing market, embedded board vendors have followed up quickly with boards based on those CPUs like the Core2Duo and others. This product roundup displays a representative sample of multicore boards on a variety of embedded form factors.
The multicore transition in the microprocessor world is already in full swing. The road maps of the leading processors show that all roads lead to architectures sporting multiple CPU cores on the same device. Because the trend is fundamental across all processor vendors, issues surrounding multicore processing must be faced by all high-end computing applications today or in the near future. Many military applications have an immediate need for the level of computing muscle such devices provide. Compute-intensive applications such as sonar, radar, SIGINT and UAV control systems fall into that category, along with several others. AMOD, an upgrade to the Aegis Weapon System (AWS), the automated segment of the Aegis Combat System (ACS) (Figure 1), is using 2.16 GHz Core2Duo-based conduction-cooled CompactPCI boards, for example, for its processing needs.
For well over a decade, microprocessor designers have made clever use of the ever-increasing number of transistors that bless semiconductor fab advances. In order to wring the greatest possible performance increases, they used the largest number of transistors to refine their superscalar architectures and lengthen pipelines. Those techniques brought processors from 100 MHz of a decade ago all the way to the 1 GHz and more that we’re at today. Today, for reasons like power density and other physical issues–all those techniques aimed at making single microprocessors faster no longer have the return they once had. With that in mind, processor architects realize that the most efficient way to leverage the Moore’s Law “guarantee” of increasing transistor counts is to pack multiple processing units on the same die.
Although the trend toward multicore processing is nearly universal, there are two fundamentally different approaches to it. The more mainstream processor vendors like Intel, Freescale and AMD are moving to an SMP (symmetric multiprocessing) approach where each core runs a separate program thread. In an application that happens to have two completely unrelated threads, one of them can be waiting for I/O while another can be calculating. The other multicore approach is what academics call “tiled” processors. The tiled processor most talked about these days is the Cell processor. Developed by IBM, Toshiba and Sony Group, the Cell architecture features eight synergistic processing elements plus a Power Architecture-based core. Since its introduction a couple of years ago, the Cell hasn’t captured quite the interest in the military embedded computer market that some expected it to.
