VPX has become the de facto standard for the current generation of military embedded computing platforms. These systems include high-speed serial fabrics such as Serial RapidIO, PCI Express, or Ethernet. The initial VPX standards have focused on Gen1 Serial RapidIO, Gen 1 PCIe and XAUI with maximum baud rates of 2.5 to 3.125 Gbaud, Even supporting these rates is not a simple task often requiring a detailed signal integrity analysis and careful attention to the overall loss budget and the numerous signal impairments to ensure success the first time out. The new VITA 65 OpenVPX standard plans to add options for 5 and 6.25 Gbaud as well in order to support Gen2 Serial RapidIO and Gen 2 PCIe.

The recent adoption of IEEE 802.3ap 10GBase-KR, and the availability of silicon transceiver devices from a number of silicon vendors including AMCC, Broadcom and Xilinx, provide the basis for the next increment in VPX performance. This is the first standard communication protocol to support 10Gbaud per pair operation over a backplane, so it is a natural next step for VPX to implement 10GBase-KR for rugged applications. 10GBase-KR will require a signal integrity analysis paradigm shift from the classic time domain approaches (eye diagrams) to frequency domain and statistical approaches. Gen2 Serial RapidIO and Gen 2 PCIe include some of this thinking, but 10GBase-KR takes it to a whole new level.

Designing a compliant interoperable channel for 10.3 Gbaud over a single lane on a typical VPX backplane poses a number of technical challenges. To understand these challenges, it's helpful to looks at a representative VPX channel for 10GBase-KR compatibility using the IEEE 802.3ap compliance metrics. Understanding the tools and techniques for simulating a 10 Gbaud channel is also key.

VPX Channel Topology

VITA 46 systems come in a number of mechanical form factors. Regardless of the chassis arrangement, VPX backplanes are implemented in either 3U or 6U heights. The VPX REDI standards detail the slot pitch (0.8-in., 0.85-in., 1.0-in), the connector footprint and the pin assignments for differential pairs. A representative channel topology is shown in Figure 1. Backplane traces can range from 1 inch for adjacent slots to about 17 inches for a 21-slot, 0.8-inch pitch system. Typically, the maximum trace length is limited to control the maximum attenuation. For this study, we will consider a maximum backplane trace length of 17 inches.

VPX module trace lengths can range from roughly 1.5 inches with the transceiver placed just next to the connectors, to a practical maximum of about 4 inches. In terms of the frequency-dependent skin-effect losses, the module's trace length will often have more impact on the overall channel attenuation than the backplane traces because of the small etch geometries typically used on module PCBs. For this study, we assume that the module does not include a mezzanine connector/PCB in this path.

10GBase-KR-Compliant Channel

The IEEE 802.3ap specification defines a compliant channel with specific test point locations. The test channel does not include the transceiver package impairments or the discontinuities related to the BGA escape via or AC coupling capacitors. The test points that define a test channel are noted as TP1 to TP4 in the VPX backplane simulation topology diagram shown in Figure 2.

The 10GBase-KR specifies a number of frequency domain parameters in Annex 69B that can be used to evaluate channel conformance such as fitted attenuation, insertion loss deviation, return loss, and insertion loss to crosstalk ratio. The transmit and receive blocks have their own compliance metrics, which are not simulated or discussed in any detail here. The benefit of a compliant channel is that link performance can be evaluated with the assumption that the transceivers are known to be compliant. This study focuses exclusively on the VPX channel and will use behavioral transceivers integrated into the ADS channel simulation environment to replicate 10GBase-KR transmitter and receiver characteristics.

VPX Connector Modeling

VPX systems based on VITA 46 utilize a MultiGig-RT2 connector; this represents the vast majority of systems in use today. Recently, an alternative Viper connector has become available as well (VITA 60 draft), but it is not in widespread use today. Since the connectors share the same via footprints and pinouts, we will study both of these connectors.