DDC-I and North Atlantic Industries Announce DAL A BSP
Support for Safety-Critical Deos RTOS Running on NAI’s 68PPC2 T2080 Multi-core OpenVPX Single Board Computer
FACE-conformant avionics platform features bounded multi-core response with
complete DO-178C/ED-12C DAL A verification for rapid development, certification, and deployment
DDC-I, a leading supplier of software and professional services for mission- and safety-critical applications, and North Atlantic Industries, a leading provider of embedded systems for mil/aero applications, today announced the availability of DDC-I’s Deos™ DO-178C Design Assurance Level A (DAL A) verified FACE-conformant real-time operating system and a DAL A Board Support Package (BSP) for NAI’s 68PPC2 T2080 PowerPC OpenVPX single board computer. The BSP provides complete DO-178C/ED-12C DAL A verification evidence, including high assurance boot, multiple Ethernet channels leveraging the T2080 DPAA, PCIe, SATA flash storage, I2C, serial, real-time clock, watchdog timer, SPI, USB, and GPIO, greatly accelerating the development, deployment, and certification of high-performance safety-critical
applications for avionics systems.
DDC-I’s approach to building safety-critical software mirrors North Atlantic’s configuring boards, emphasizing modular, scalable, portable DAL-A verification. Deos utilizes a DAL-A linking loader that allows OS binary components and their artifacts to travel separately. NAI’s Configurable Open Systems Architecture™ (COSA®) utilizes highly modular, portable components that can be added or removed and reapplied to other system configurations with maximum reuse of DAL-A artifacts. This shared commitment to modularity, portability, and reuse enables avionics designers utilizing Deos and the COSA architecture to reconfigure their I/O systems with minimal impact on hardware, software, and DO-178 recertification.
“Our SafeMC multi-core technology and reusable verification evidence make Deos an ideal
environment for developing, certifying, and deploying high-performance, FACE-conformant, safety-critical avionics applications targeting the 68PPC2 and COSA architecture,” said Greg Rose, Vice President of Marketing at DDC-I. “Our SafeMC technology provides unique solutions to address the AC 20-193 multi-core objectives, delivering best-in-class performance and determinism for safety-critical applications running on NXP PowerPC multi-core processors.”
“Deos running atop the 68PPC2 gives avionics developers an integrated platform that combines high-performance multi-core performance with a best-in-class safety-critical RTOS,” added < Lino Massafra, Vice President of Sales and Marketing at NAI. “Developers requiring the highest level of design assurance now have a rugged, flexible, off-the-shelf solution with configurable I/O and DAL-A evidence in a compact, low-power package that accelerates deployment of safety-critical systems.”
Deos is a safety-critical embedded RTOS that employs patented cache partitioning, memory pools, and safe scheduling to deliver higher CPU utilization than other certifiable safety-critical COTS RTOS on multi-core processors. First certified to DO-178 DAL A in 1998, Deos combines DO-178C DAL A artifacts with FACE® Technical Standard support encompassing the Safety Base and Extended Profiles for the Operating System Segment (OSS). The Safety Base Profile features hard real-time response, time, space partitioning, and ARINC-653 and POSIX interfaces. The Safety Extended Profile, which adds support for TCP/IP communications, multi-process support, and expanded POSIX capability (80 extra functions), is a superset of the functionality required by the Safety Base and Security Profiles.
SafeMC technology extends Deos’ advanced capabilities to multiple cores, enabling developers of safety-critical systems to achieve best-in-class multi-core performance without compromising safety-critical task response and guaranteed execution time. SafeMC employs a bounded multi-processing (BMP) extension of the symmetric multi-processing architecture (SMP), safe scheduling, and cache partitioning to minimize cross-core contention and interference patterns that affect the performance, safety criticality, and certifiability of multi-core systems. These features enable avionics systems developers to address issues that could impact the safety, performance, and integrity of a software airborne system executing on Multi-Core Processors (MCP), as specified by the FAA Advisory Circular AC 20-193.
The 68PPC2 is a 3U OpenVPX™ NXP® T2080 PowerPC single-board computer that can be configured with up to two NAI smart I/O and communications function modules. Featuring an NXP QorlQ® T2080
Quad Core e6500 Processor running at 1.5 GHz and consuming less than 25W, the 68PPC2 is ideally suited for rugged Mil-Aero applications that accelerate deployment of SWaP-optimized systems in air, land, and sea applications. The 68PPC2 has eight Mbytes of DDR3 SDRAM and 32 Gbytes of SATA II NAND Flash. It also features PCIe, USB, I2C, TTL, and RS-232 interfaces and an optional SATA II for external access to up to 2 Gbytes of expansion memory.